Noise Figure Measurement for Cryogenic System
Project Description
The recent developments in quantum computing and sensing have created a growing demand for integrated cryogenic electronics to read and control many qubits. CMOS technologies provide a promising solution for large-scale qubits cryogenic systems due to their low-cost and unparalleled large-scale integration as well as their potential compatibility with semiconductor qubits fabrication. Recent work has shown the back control of full depleted CMOS SOI (FDSOI) technology provides a powerful tool to realize high performance cryogenic CMOS circuits. As the frontend circuit to interact with qubits and amplify the readout signal, the cryogenic low noise amplifier (Cryo-LNA) is one of the most critical components in the entire qubits readout system. It needs to provide ultra-low noise figure and high gain to ensure readout signal fidelity. Additionally, broadband operation is required since multiple Qubits will be read-out at the same time. For discrete Qubits, the readout system usually works at the sub-1 GHz frequency range. However, for a compact footprint and the integration of large numbers of physical qubits, multiple qubits can be addressed and readout at the same time using frequency multiplexing at GHz.
However, it is not trivial to set up cryogenic environment for high frequency (GHz) measurement since the device under test (DUT) will be isolated in a vacuum chamber and be cooled down to cryogenic temperature. Any room temperature noise leak through will increase the thermal load of the fridge as well as overwhelm the DUT creating measurement error. Therefore, it requires extensive and detailed de-embedding process.
In this project, the student will:
- Get to know and use advance PNA vector network analyzer.
- Get to know and measure RF/mm-Wave circuits
- Design de-embedding structures and printed circuits board (PCB) for cryogenic measurement
- Get to know and use cryogenic station to measure DUT
- Get to use matlab to write custom code to de-embed S-parameter file
Requirements
- Analog Integrated Circuits
- Communication Circuits
Project components
- 20% Literature review
- 10% Theory
- 40% Board-level design
- 30% Measurement
Contact
- Boce Lin : boclin [at] ethz.ch
- Prof. Dr. Hua Wang : hua.wang [at] iis.ee.ethz.ch